VisSim Embedded™ for TI Piccolo, Soprano, Delfino and Concerto
Anthony Boon - Chief Engineer
ETA Electronic Design SAGL
VisSim Embedded uses TI Code Composer to form a complete, integrated tool chain that provides model based development for Texas Instruments MCUs. First you create block diagrams of your control and plant, then you simulate to debug and tune offline. Next you compile your diagram with the click of a button, download and debug it on the target with the click of another button, all from the VisSim environment. VisSim automatically generates C code and sends it to the TI Code Composer C compiler tools to compile, link and connect via JTAG to the target. VisSim Embedded includes support for all the F280x, F283x (Delfino) and F280xx (Piccolo) C2000 family including the latest F2837x and F2807x parts. To switch targets within the family, simply change the target selector in the MCU Config dialog. VisSim abstracts the differences between devices and generates proper code for the given target. There are many small differences between devices in the Defino and Piccolo family including peripheral enable bits, serial/SPI,I2C FIFO lengths, clock setup registers, external GPIO pin mappings etc. But VisSim handles the differences automatically so you can focus on algorithm development and tuning.
Integration with UML State Charts
The VisSim data flow diagram is tightly integrated with the VisSim/State Chart addon. This makes it easy to create algorithms that for things like complex sequencing of start up states, exceptional failure mode handling, or protocol decoding. You can place any number of state charts within a VisSim diagram. Data flow variables can be referenced within the state chart and the currently active state can be used for decision making within the data flow space.
Supports both Fixed and Floating Point Piccolo and Concerto Parts
These parts have a wide variety of features and capabilities from fixed point only to hardware FPUs, on-chip USB, comparators, DACS, and a range of RAM and flash sizes. VisSim will automatically exploit the new resources and features simply by selecting the proper target in the CPU dropdown list.
Hard Real-Time Visual RTOS
- Royalty Free
- Graphical specification of tasks:
- Synchronous multi-rate subtasks
- Pre-emptible multi-rate background tasks
- Interrupt handlers for on-chip peripheral events (ADC, GPIO, CAN, PWM, DMA)
- Interrupt based queueing for serial peripherals (SPI, UART, I2C)
- Graphical configuration of on-chip peripherals
- Continuous Monitoring of CPU, stack and heap usage
- Triggered on-chip buffers for digital scope view of any computed value
- Interactive update of on-chip parameters for easy debug and test
Efficient Code Generation
VisSim Embedded's ability to generate highly efficient code results in high sample rates, low jitter, and efficient use of flash and RAM. For example, two independent Sensorless Field Oriented Vector Control of 2 PMSM motors run at 50% of a 100 microsecond time slice (10 kHz sample rate) on a 60 MHz F28035 Piccolo device. This is only 4% slower than the hand coded assembler from the TI Motor group. The same program uses only 5.3k flash and 2.7k RAM (including 800 words of signal waveform capture buffer) on a 60 MHz F28035 Piccolo device. As a TI 3rd party partner, Visual Solutions has gained valuable access to TI technology to tune VisSim Embedded to make best use of TI processors and peripherals.
Ideal for Digital Power and Motor Control
The VisSim/Digital Power Designer addon provides high level, configurable blocks for power stage simulation and a wide variety of modern digital power control structures. VisSim Embedded includes support for control of AC induction, PMSM, BLDC, brush and stepper motors. Included are working diagrams for TI kits.
Supports the XDS100 Low Cost JTAG link
The VisSim JTAG hotLink directly supports the XDS100 low cost JTAG supplied with TI motor control and digital power kits. Support is also included for Spectrum Digital JTAG emulators
Piccolo ADC Unit
For the ADC unit, which is much changed and improved for Piccolo, VisSim provides a different ADC Config dialog that allows you to select the trigger for each ADC channel (unlike the older F280x and Delfino ADC unit which is divided into two 8 channel banks, and each bank can select a trigger).
- VisSim/Fixed Point block set performs simulation and efficient code generation of scaled fixed-point operations like sin, cos, sqrt, atan2, FIR, and IIR; overflow and precision loss effects are easily seen and corrected at simulation time; auto-scaling speeds fixed-point development; in-line code generation creates fast target code
- Peripheral blocks to generate code for C2000 on-chip devices: 280x ePWM, eQEP, eCAP, ADC, GPIO, quadrature encoder, comparator, event capture, CAN 2.0, SCI(RS232,UART,serial port), SPI, McBSP, watchdog, and interrupts
- Full control of PWM including dynamic control of PWM period and phase, ADC start of conversion, trip zone, deadband intervals, action selection
- Interrupt-based queue drivers for serial(SCI), SPI, and McBSP; user selectable queue lengths and use of hardware FIFO result in lower system overhead
- Diagram-based interrupt handlers for XINT, ADC, PWM, and DMA
- Easy creation of background tasks; subsystem dialog to create a background task that runs at a user specified rate
- TI C2000 Digital Motor Control (DMC) block set supports simulation and code generation of efficient, fixed-point routines for Park and Clarke transforms, rotor speed and flux estimation, PID control, space vector waveform generation for AC Induction, and brushless DC motor control
- Automatic C code generation of production quality, fixed-point code; compile, link, and JTAG download
- Retention of the VisSim GUI while algorithm executes on MCU lets you visualize interactive plots of MCU outputs and change DSP gains and parameters in real time
- VisSim Code Composer Studio v3.x (CCS) plug-in for automatic CCS project creation
- TI C2000 CAN bus support
- Serial-port-based LCD display support
- Efficient 7- and 14-segment LCD display support for MSP430; user table can customize segment assignments; auto conversion from scaled fixed-point to decimal display uses no floating point and no divide for maximum efficiency on MSP architecture
- Conditional execution of subsystems based on any Boolean condition, including occurrence of interrupt
- User control of execution order of parallel flows is done top down; subsystem contents are completely executed before the next block on given layer, which provides fine grain control necessary for hardware device access
- State transition block provides unlimited states and transition conditions; transition conditions are C expressions
Supported C2000 targets
Supported C2000 target processors include:
F2801, F28015, F28016, F2802, F2806, F2808, F2809
F28332, F28334, F28335, F28341, F28342, F28343, F28344, F28345, F28346, F28377d, F2837x
F28020, F2802x, F28027, F28030, F2803x, F28035, F28044, F2805x. F2806, F28062, F2806x, F28069, F28074, F28075
F28M35x, F28M36x, (F28M35H52, F28M36P63)