VisSim Embedded™ for TI MSP430

TI 3rd Party Network

MSP430G2553 Timer Config
MSP430G2553 Timer Configuration Dialog
MSP430G2553 ADC Config
MSP430G2553 ADC Configuration Dialog
I2C Config
MSP430 I2C Configuration Dialog

VisSim/ECD includes support for all the MSP430 family. To switch targets within the family, simply change the target selector in the MCU Config dialog. VisSim abstracts the differences between devices and generates proper code for the given target. There are many small differences between devices in the MSP430 family including peripheral enable bits, serial/SPI, I2C device configuration, clock setup registers, external port pin mappings etc. VisSim handles the differences automatically so you can focus on algorithm development and tuning. In addition, the VisSim RAM efficient RTOS lets you target low end MSP430 parts with as little as 2K flash and 128 bytes of RAM.

Timer Configuration and Low Power Mode

Timer configuration varies dramatically among the different MSP430 families and parts. VisSim automatically puts up the proper configuration dialog appropriate for your selcted part to let you select crystal and clock sources for ACLK, SMCLK and MCLK, (VLO, LFXT1/2, DCO, ACLK) and then select the clock source for Timers A/B/A1/A2/Basic Timer. A simple dropdown lets you choose among 6 possible Low Power Modes. VisSim will automatically arrange to enable and disable clocks on main control function entry and exit.

MSP430 ADC Unit

VisSim supports the MSP430's many different ADC units: 10 bit, 12 bit, and 16 bit Sigma Delta. Depending on the particular subfamily of chip you select, VisSim provides a different ADC Config dialog.

MSP430G2x Series Value Line

These parts are cheaper and may not adhere to the same tolerances of the other lines, but VisSim supports them just the same (20 MHZ). VisSim will automatically allow you to configure on-chip resources and features simply by selecting the proper target in the CPU list.

MSP430FR5x and FR6x FRAM Series

These parts use ferroelectric RAM (FRAM) instead of flash and RAM. FRAM is a memory technology that combines the best of Flash and SRAM. It is non-volatile like Flash, but offers fast, low power writes, write endurance of 10^15 cycles, code and data security that is less vulnerable to attackers than Flash/EEPROM, and resistance to radiation and electromagnetic fields. VisSim will automatically allow you to configure on-chip resources and features simply by selecting the proper target in the CPU list.

Efficient Code Generation

VisSim/ECD's ability to generate highly efficient code results in high sample rates, low jitter, and efficient use of flash and RAM. For example, two independent Sensorless Field Oriented Vector Control of 2 PMSM motors run at 50% of a 100 microsecond time slice (10 kHz sample rate) on a 60 MHz F28035 Piccolo device. This is only 4% slower than the hand coded assembler from the TI Motor group. The same program uses only 5.3k flash and 2.7k RAM (including 800 words of signal waveform capture buffer) on a 60 MHz F28035 Piccolo device. As a TI 3rd party partner, Visual Solutions has gained valuable access to TI technology to tune VisSim/ECD to make best use of TI processors and peripherals.

Direct Supports for the USB JTAG link

The VisSim directly supports the MSP430 USB JTAG on TI motor LaunchPADs and emulator pods. You can flash your program directly from VisSim.

MSP430 Serial Config
Serial Configuration common to all MSP430 devices

Features

  • VisSim/Fixed Point block set performs simulation and efficient code generation of scaled fixed-point operations like sin, cos, sqrt, atan2, FIR, and IIR; overflow and precision loss effects are easily seen and corrected at simulation time; auto-scaling speeds fixed-point development; in-line code generation creates fast target code
  • Peripheral blocks to generate code for MSP430 on-chip devices: PWM, Capture, ADC (ADC10/ADC12/SD16/SD16A), digital ports, serial UART, comparator, SPI, watchdog, LCD, and interrupts
  • Full control of PWM including dynamic control of PWM period, count mode, output pin, wave form mode
  • Interrupt-based queue drivers for serial(SCI), SPI, and I2C; user selectable queue lengths and use of hardware FIFO result in lower system overhead
  • User specified interrupt handler creation for digital ports, Timer A and Timer B
  • Easy creation of background tasks; subsystem dialog to create a background task that runs at a user specified rate
  • Digital Motor Control block set supports simulation and code generation of efficient, fixed-point routines for Park and Clarke transforms, rotor speed and flux estimation, PID control, space vector waveform generation for AC Induction, and brushless DC motor control
  • Automatic C code generation of production quality, fixed-point code; compile, link, and JTAG download
  • Supported processors include TI MSP430 (all flavors), C2000 (all flavors) including F2808 and variations, F28027, F28035 (Piccolo), F28335(Delfino), LF2407, F2812, C5510, C6713, Intel x86 PC
  • Supports Code Composer Studio v3x/4x/5x
  • Efficient 7- and 14-segment LCD display support for MSP430; user table can customize segment assignments; auto conversion from scaled fixed-point to decimal display uses no floating point and no divide for maximum efficiency on MSP architecture
  • Conditional execution of subsystems based on any Boolean condition, including occurrence of interrupt
  • User control of execution order of parallel flows is done top down; subsystem contents are completely executed before the next block on given layer, which provides fine grain control necessary for hardware device access
  • State transition block provides unlimited states and transition conditions; transition conditions are C expressions

Downloads

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