Delfino CLA

I have added a CLA function implemented as an ISR into a Delfino and compiled code using the Code Composer. It has been run on a demo board but is nearly unobservable.

I want to use VisSim to simulate the Delfino running TI-RTOS, capturing 4-channels/paths of 16-bit data at 128 kHz. The data is streamed out using DMA to the SPI, as well as copied as 4 instances of 16-bit samples to the CLA. The CLA processes the samples and once every 8k passes of the 128k rate provides some floating-point words.

The TI-RTOS is legacy code, the ADC sampling has been added and streamed out through the

Which is better to use: Floating point or fixed point blocks?

I have a Delfino F28335 and it does floating point in the hardware. Which is better, fixed-point or floating point?

Amazingly Low Cost TI Kits for Embedded Development

I have to say that I am very pleased with Texas Instruments latest round of DSP and microprocessor development kits. They have done an amazing job of taking the cost out of sophisticated embedded development. At one time, the JTAG pod alone cost $1500, now it is included free with the kit. They have the latest TI C2000 parts: F28335 and F28035, real-time JTAG connection to the PC, high quality analog sensors, and a very good C compiler.

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